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Note that this is not a standard configuration as the 7I90 is a 50 pin connector FPGA card
and the 7I85S is s 25 pin FPGA card daughtercard. I pinned this out so a flat cable adapter
should be relatively simple (look at the included VHD source file for the pinout)

 

This has 3 stepgens and 1 PWMgen, 4 encoders and a sserial port
(on the 7I85S) 
 

Very briefly:

In the hal file (use the sample: basic7i97 or use MesaCT to generate the basic configurations)
The PID output pin connects to the PWM value pin. You would change this connection to 
add the abs component so you have:

PID output --> abs in --> abs out --> PWM value

That is, for example, in the basic7i97 hal file you have:

net x-output     => [HMOT](CARD0).pwmgen.00.value

This would need to change to:

net x-output     => abs.0.in
net abs-x-output    <= abs.0.out
net abs-x-output     => [HMOT](CARD0).pwmgen.00.value

 

 

i'm not even close to being done but got the viewer hooked into a custom .ui file. i think i am on the downhill side of things now but this seems to be the hard way to do it but since i have so much time in teaching myself this i will finish what i started. but basically, it's done in OpenGL.

I understand, thank you! The duplication was unintentional. My apologies