Another small milestone:
There is now a PRV32 (PicorV32/RISC-V) plugin that allows one or more soft cores to run in the FPGA.
A few tweaks still need to be made, but it’s already good enough for tinkering
* Up to 16 GPIOs
* Multiple 32-bit variables for data exchange with LinuxCNC
* Serial support
* GCC support
* tested on TangNano9k, ICE40up5k, ICE40hx8K
TODO:
* Add I2C and SPI master support
* Add PWM support
* 1-bit variables for LinuxCNC
* Adding support for use as an interface plugin
* Testing and optimize for more platforms
At the moment, I don’t have a practical application for it yet, but one will come along. (Anything that’s too cumbersome in Verilog, or for those who know C)
Furthermore, there’s also a SERV (World’s Smallest RISC-V) plugin,
which is considerably more resource-efficient but currently only offers assembler support and 3 output pins.